Member since: 1 year
Educational Institution: Presidency University
Country: India
Active High S-R Gate
Active High S-R GateEX-NOR Gate
EX-NOR GateFull Adder and Subtractor using NAND Gate Only
Full Adder and Subtractor using NAND Gate OnlyImplementation of Basic Gates using NAND Gate
Implementation of Basic Gates using NAND Gate2:1 4:2 8:3 Encoder
2:1 4:2 8:3 EncoderExperiment NO 6
Experiment NO 6Experiment NO 5 Level 1
Experiment NO 5 Level 1Experiment NO 5 Level 2
Experiment NO 5 Level 2AND Gate
AND GateOR Gate
OR GateNOT Gate
NOT GateNOR Gate
NOR GateNAND Gate
NAND GateEX-OR Gate
EX-OR GateImplementation of Basic Gates using NOR Gate
Implementation of Basic Gates using NOR GateHalf Adder and Subtractor
Half Adder and SubtractorFull Adder and Subtractor
Full Adder and Subtractor2:1 and 4:1 MULTIPLEXER
2:1 and 4:1 MULTIPLEXERHalf Adder and Subtractor Using Nand Gate Only
Half Adder and Subtractor Using Nand Gate Only2:1 and 4:1 DEMULTIPLEXER
2:1 and 4:1 DEMULTIPLEXER2:1 and 4:1 MULTIPLEXER using universal gates
2:1 and 4:1 MULTIPLEXER using universal gates2:1 and 4:1 DEMULTIPLEXER using universal gates
2:1 and 4:1 DEMULTIPLEXER using universal gates2-Bit Synchronous J-K UP counter
2-Bit Synchronous J-K UP counter2-Bit Comparator
2-Bit Comparator3-Bit Comparator
3-Bit ComparatorActive Low S-R Gate
Active Low S-R Gate1-Bit Comparator
1-Bit Comparatorex or gate
ex or gategates
gatesand gate nor gate
and gate nor gateexp-7 lev-2
exp-7 lev-2exp-5
exp-5