V.SRIYOGESH - Circuits

V.SRIYOGESH

Member since: 12 months

Educational Institution: Not Entered

Country: India

ALL GATE

ALL GATE

Public

project.name

new type gate

new type gate

Public

project.name

BASIC GATE USING UNIVERSAL GATE

BASIC GATE USING UNIVERSAL GATE

Public

project.name

Untitled

Untitled

Public

project.name

3-BIT HALFADDER AND SUBTRACTOR

3-BIT HALFADDER AND SUBTRACTOR

Public

project.name

2-BIT HALFADDER AND SUBTRACTOR

2-BIT HALFADDER AND SUBTRACTOR

Public

project.name

EXP - 4 lv-2

EXP - 4 lv-2

Public

project.name

FA_SA

FA_SA

Public

project.name

Experiment 2 level 2

Experiment 2 level 2

Public

project.name

3 exp

3 exp

Public

project.name

FA_SA

FA_SA

Public

project.name

exp3

exp3

Public

project.name

(4 to 2) line and (8 to 3) Line Encoders

(4 to 2) line and (8 to 3) Line Encoders

Public

project.name

b- TRANSFORMATION OF NAND GATE INTO BASIC LOGIC GATE

b- TRANSFORMATION OF NAND GATE INTO BASIC LOGIC GATE

Public

project.name

V.SRIYOGESH doesn't have any favourites.

V.SRIYOGESH is not a collaborator of any project.