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DAKSHITH BENDADI

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LAB 5

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4x1 1x4

4x1 1x4
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POS OSP

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FULL SUBSTRACTOR CIRCUIT

FULL SUBSTRACTOR CIRCUIT
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HALF SUBTRACTOR CIRCUIT

HALF SUBTRACTOR CIRCUIT
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ASSINGMENT

ASSINGMENT
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Verification and interpretation of truth table for AND,OR,NOT,NAND,NOR,Ex-OR,Ex-NOR gates

Verification and interpretation of truth table for AND,OR,NOT,NAND,NOR,Ex-OR,Ex-NOR gates
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