Darpan Adhikari
Member since: 1 year
Educational Institution: Not Entered
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trial
trial
Public
Full adder using half adder
Full adder using half adder
Public
Full adder using Decoder
Full adder using Decoder
Public
4 Bit Binary Parallel adder
4 Bit Binary Parallel adder
Public
Master Slave JK flip-flop using Nand gates
Master Slave JK flip-flop using Nand gates
Public
Parallel in serial out
Parallel in serial out
Public
Synchronous BCD counter to Seven Segment Display
Synchronous BCD counter to Seven Segment Display
Public
8-bit computer simplified v2
8-bit computer simplified v2
Public
Serial Input Serial Output (SISO),Serial Input Parallel Output (SIPO)
Serial Input Serial Output (SISO),Serial Input Parallel Output (SIPO)
Public
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