project.name

Mohd Irfan

Member since: 1 year

Educational Institution: vit ap

Country: India

universal gates

universal gates
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universal gate using nor

universal gate using nor
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universal gate using nand

universal gate using nand
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Half Subtractor

Half Subtractor
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full subtractor

full subtractor
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full subtractor

full subtractor
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4 Bit Magnitude Comparator

4 Bit Magnitude Comparator
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full adder

full adder
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multiplexer

multiplexer
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de multiplexer

de multiplexer
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3 to 8 line decoder

3 to 8 line decoder
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half adder

half adder
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flip flop

flip flop
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universal gates

universal gates
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J K flip flop

J K flip flop
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flip flop

flip flop
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D flip flop

D flip flop
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E1910012 , DE ASSIGNMENT , DEMUX

E1910012 , DE ASSIGNMENT , DEMUX
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ASYNCHRONOUS COUNTER USING JK FLIP FLOP

ASYNCHRONOUS COUNTER USING JK FLIP FLOP
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3 Bit Synchronous Up Counter J-K Flip Flops

3 Bit Synchronous Up Counter J-K Flip Flops
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3 bit synchronous up counter using jk flip flop

3 bit synchronous up counter using jk flip flop
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4 bit asynchronous counter using t flip flop

4 bit asynchronous counter using t flip flop
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basic gates

basic gates
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8:3 Encoder

8:3 Encoder
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4x1 Multiplexer

4x1 Multiplexer
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8 X 1 MULTIPLEXER

8 X 1 MULTIPLEXER
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4 Bit Magnitude Comparator Circuit

4 Bit Magnitude Comparator Circuit
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