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MEGHANA

Member since: 2 years

Educational Institution: Not Entered

Country: Not Entered

Untitled

Untitled
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Untitled

Untitled
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implementation of basic gates from NAND GATE

implementation of basic gates from NAND GATE
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exp 4 level 2

exp 4 level 2
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mgkr

mgkr
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ENCODER AND DECODER LEVEL 1

ENCODER AND DECODER LEVEL 1
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implementation of basic gates from NAND GATE

implementation of basic gates from NAND GATE
Public
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implementation of basic gates from NAND GATE

implementation of basic gates from NAND GATE
Public
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EXP 8

EXP 8
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exp7

exp7
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Untitled

Untitled
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2 BIT FULL ADDER

2 BIT FULL ADDER
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4x1 Multiplexer

4x1 Multiplexer
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5

5
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PRIORITY ENCODER

PRIORITY ENCODER
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logic gate

logic gate
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logic gate

logic gate
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implementation of basic gates from NAND GATE

implementation of basic gates from NAND GATE
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4*1 USING NAND GATES

4*1 USING NAND GATES
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EXP 6 SR LATCHES

EXP 6 SR LATCHES
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MULTIPLEXER USING BASIC GATES

MULTIPLEXER USING BASIC GATES
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2-bit adder and subtractor

2-bit adder and subtractor
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