[CSCA] Register Transfer and Bus Systems
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Author: Igor Rončević

Project access type: Public

Description:

Register transfer methods and bus systems discussed in the Computer Science and Computer Architectures [CSCA] course at the University of Applied Sciences CAMPUS 02, Graz, Austria.

The project features the following circuits:

  • 4-Bit Register - reusable sub-circuit developed by using D flip-flops, and used as register element in other circuits.
  • Many-to-One Register Transfer - demonstrates transferring content from several source registers to a single target register via multiplexer.
  • One-to-Many Register Transfer - demonstrates transferring content from a single source register to several target registers via decoder.
  • Common Bus System (Isolated) - demonstrates a common bus system isolated from external inputs.
  • Common Bus System (With Initial Input) - demonstrates a common bus system with external input used to initially load content into registers.
  • Common Bus System (Registers and RAM) - demonstrates a common bus system used to transfer content between registers and RAM.

Created: Jan 10, 2023

Updated: Aug 27, 2023


Comments

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Great Effort
Posted on Jan 11 2023 at 09:22PM UTC.
+0
Thanks Beroo :-)
Posted on Jan 12 2023 at 09:14PM UTC.
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I agree with Beroo, amazing effort! I have a question about the output on "Common Bus System (Isolated)", how does it get values to the output? I don't seem to get it to work.../William
Posted on Jan 20 2023 at 11:10AM UTC.
+1
Thanks for the kind words William :-) The purpose of the (Isolated) example was to give a clear picture which elements are needed to construct a common bus system, without cluttering the diagram with the elements that provide e.g. initial values, or memory elements etc. Essentially, the (Isolated) circuit actually works and transvers the values between the registers, but since the circuit is isolated and all the values are zero we cannot actually see any changes because only zeros are transferred between the registers :-) To play with the data transfer, please use the other diagram, Common Bus System (With Initial Input). In it you can provide initial data to one of the registers. Alternatively, you can use the Common Bus System (Registers and RAM) example and provide some initial data in the RAM and then bring it from there to other registers.
Posted on Jan 20 2023 at 12:29PM UTC.
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