project.name

Agrani

Member since: 2 years

Educational Institution: Apex college baneshwor, kathmandu, nepal

Country: Nepal

Sequential circuit

Sequential circuit
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REVISION

REVISION
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half and full adder

half and full adder
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Untitled

Untitled
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Untitled

Untitled
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Untitled

Untitled
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TRIGGERIN

TRIGGERIN
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Verification of Boolean laws

Verification of Boolean laws
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MUX DMUX

MUX DMUX
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LAB12

LAB12
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Verification NOR as Universal gates

Verification NOR as Universal gates
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RESISTER AND COUNTERS

RESISTER AND COUNTERS
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VERIFICATION OF NAND AS UNIVERSAL GATE

VERIFICATION OF NAND AS UNIVERSAL GATE
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ADDITION SUBTRACTION USING HALF ADDER

ADDITION SUBTRACTION USING HALF ADDER
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3bit synchromous up/down Counter

3bit synchromous up/down Counter
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ADDITION SUBTRACTION USING HALF ADDER

ADDITION SUBTRACTION USING HALF ADDER
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NAND with AND

NAND with AND
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Boolean fxn and truth table

Boolean fxn and truth table
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BCD COUNTER

BCD COUNTER
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