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Country: Malaysia
D2_Circuit_3_1_ZHIMENG
D2_Circuit_3_1_ZHIMENGtest
testCircuit_2
Circuit_2Shift Registers
Shift RegistersDivide-3 counter
Divide-3 counterUntitled
UntitledSequence_Detector
Sequence_DetectorShift_Register
Shift_RegisterD2_Circuit_3_1
D2_Circuit_3_1Untitled
Untitled4-to-1 Multiplexer
4-to-1 MultiplexerUntitled
UntitledUntitled
UntitledUntitled
UntitledUntitled
UntitledD Latch +ve level
D Latch +ve levelLevel Triggered SR Latch
Level Triggered SR LatchT3 (2.3)
T3 (2.3)ZM'S DESIGN
ZM'S DESIGNDivide 3 counter
Divide 3 counter3 to 8 decoder
3 to 8 decoderFull adder
Full adderRipple Counter (Asynchronous)
Ripple Counter (Asynchronous)Registers
Registerstristate buffer
tristate bufferBidirectional Shift Registers
Bidirectional Shift RegistersSR Latch Active Low
SR Latch Active LowDivide-by-4 rippler counter (Synchronous)
Divide-by-4 rippler counter (Synchronous)D Flip-flop
D Flip-flopD-Flip Flop (Master-Slave)
D-Flip Flop (Master-Slave)Sequence_Detector
Sequence_DetectorUntitled
UntitledD2_Circuit_3_1
D2_Circuit_3_1test
testD2_Circuit_3_1_ZHIMENG
D2_Circuit_3_1_ZHIMENGShift_Register
Shift_RegisterUntitled
Untitled