Compare the behaviour of the D latch to the D flip flop.

Observe that the output of the latch changes when the input is changed (as long as the clock signal is high) whereas the flop flop only changes output at a positive transition of the clock. (0 to 1 change).

The latch is asynchronous. (level sensitive enable input)

The flip flop is edge triggered.  It is a synchronous device.(Output only follows input when clock transitions from 0 to 1)