vivek smart boy
Member since: 1 year
Educational Institution: PRESIDENCY UNIVERSITY BANGALORE
Country: India
8:3 encoder
8:3 encoder
Public
4:2 encoder
4:2 encoder
Public
MUX8:1
MUX8:1
Public
EXPERMENT 1
EXPERMENT 1
Public
Experment-2
Experment-2
Public
EXPERMENT 4
EXPERMENT 4
Public
RECORD
RECORD
Public
using basic gates implementation full adder
using basic gates implementation full adder
Public
Untitled
Untitled
Public
mux 2:1
mux 2:1
Public
MUX 4:1
MUX 4:1
Public
m(0,1,3,6,7) using 4:1 mux & 8:1 mux
m(0,1,3,6,7) using 4:1 mux & 8:1 mux
Public
m(0,1,3,6,7) using 4:1 mux & 8:1 mux
m(0,1,3,6,7) using 4:1 mux & 8:1 mux
Public
EXPERMENT-3
EXPERMENT-3
Public
EXPERMENT3
EXPERMENT3
Public
8;1 using 4:1
8;1 using 4:1
Public
m(0,1,3,6,7) using 4:1 mux & 8:1 mux
m(0,1,3,6,7) using 4:1 mux & 8:1 mux
Public
m(0,1,3,6,7) using 4:1 mux & 8:1 mux
m(0,1,3,6,7) using 4:1 mux & 8:1 mux
Public
EXPERMENT 1
EXPERMENT 1
Public
8;1 using 4:1
8;1 using 4:1
Public
m(0,1,3,6,7) using 4:1 mux & 8:1 mux
m(0,1,3,6,7) using 4:1 mux & 8:1 mux
Public
16:1 using 8:1,4:1,2:1 mux
16:1 using 8:1,4:1,2:1 mux
Public
8:1 mux using 4:1 and 2:1
8:1 mux using 4:1 and 2:1
Public
