project.name

Shivam kumar (100)

Member since: 2 years

Educational Institution: Ajay Kumar garg Engineering college ghaziabad

Country: India

2 ragister 2 bit each

2 ragister 2 bit each
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4-bit Ripple Carry Adder

4-bit Ripple Carry Adder
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binary to gray

binary to gray
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gray to binary

gray to binary
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DECODER 3,8

DECODER 3,8
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RTL

RTL
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mux 4*1

mux 4*1
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Untitled

Untitled
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half adder and full adder

half adder and full adder
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basic gate study

basic gate study
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2 bit carry look ahead adder

2 bit carry look ahead adder
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4 bit look ahead carry adder

4 bit look ahead carry adder
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ALU

ALU
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Design the data path of a computer from its register transfer language description.

Design the data path of a computer from its register transfer language description.
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RTL

RTL
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