experiment_1_gates

Multiplexer_4x1

De_Multiplexer_4x1

FULL ADDER

HALF SUBTRACTER

FULL SUBTRACTER

Implement 3-bit parallel Binary Adder/Subtractor

4x16 decoder

2x4 decoder

2x4 decoder

8X1 DEMULTIPLEXUR

D flip-flop

3:8 Decoder

Exp_6:Implement a 2x2 Binary Multiplier.

HALF ADDER

3 bits carry look ahead adder

8 X 1 MULTIPLEXER

External_practical

SR Flip Flop

3 bits carry look ahead adder

4x16 decoder

2x4 decoder

Untitled

8X1 DEMULTIPLEXUR

4*1 multiplexer

1X4 DEMULTIPLEXER

1 bit full adder

Half-Adder

Implement 3-bit parallel Binary Adder/Subtractor

Full-Subtractor

half subtractor

D flip-flop

SR Flip Flop

3:8 Decoder

Exp_6:Implement a 2x2 Binary Multiplier.

8 X 1 MULTIPLEXER

SR Flip Flop