Member since: 2 years
Educational Institution: KIET GROUP OF INSTITUTIONS,GHAZIABAD
Country: India
Implement Half Adder, Full Adder, Half Subtractor and Full Subtractor.
Implement Half Adder, Full Adder, Half Subtractor and Full Subtractor.binary to gray
binary to grayExperiment 8 2x4,3x8 Decoders ParthSharma2100290130119
Experiment 8 2x4,3x8 Decoders ParthSharma2100290130119Study and verify the outputs of the logic gates
Study and verify the outputs of the logic gatesExperiment10 1x4, 1x8 Demultiplexers ParthSharma2100290130119
Experiment10 1x4, 1x8 Demultiplexers ParthSharma2100290130119Experiment12_2BitALU_ParthSharma_2100290130119
Experiment12_2BitALU_ParthSharma_2100290130119Experiment12
Experiment12Experiment11_Verify_SR/DFlipFlop_NANDgates
Experiment11_Verify_SR/DFlipFlop_NANDgatesexp 13
exp 13binary to gray and gray to binary
binary to gray and gray to binary3-bit carrylookahead adder(CLA)
3-bit carrylookahead adder(CLA)Implement 3-bit parallel Binary Adder/Subtractor.
Implement 3-bit parallel Binary Adder/Subtractor.Implement (4 to 2) line and (8 to 3) line Encoders.
Implement (4 to 2) line and (8 to 3) line Encoders.3-bit Binary Multiplier
3-bit Binary Multiplierflip flop
flip flopExperiment 8 2x4,3x8 Decoders ParthSharma2100290130119
Experiment 8 2x4,3x8 Decoders ParthSharma2100290130119Experiment 8 2x4,3x8 Decoders ParthSharma2100290130119
Experiment 8 2x4,3x8 Decoders ParthSharma2100290130119Experiment11_Verify_SR/DFlipFlop_NANDgates ParthSharma_2100290130119
Experiment11_Verify_SR/DFlipFlop_NANDgates ParthSharma_2100290130119Experiment10 1x4, 1x8 Demultiplexers
Experiment10 1x4, 1x8 DemultiplexersExperiment 9 4x1,8x1 Multiplexers ParthSharma2100290130119
Experiment 9 4x1,8x1 Multiplexers ParthSharma2100290130119Implement 4x1 and 8x1 multiplexer.
Implement 4x1 and 8x1 multiplexer.