project.name

Shyamak

Member since: 2 years

Educational Institution: Not Entered

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Design 1 bit comparator using 4:1 MUX

Design 1 bit comparator using 4:1 MUX
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4Bit ALU

4Bit ALU
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full adder using decoder

full adder using decoder
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SOP_T1_21BCE2952

SOP_T1_21BCE2952
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F'SOP_21BCE2952

F'SOP_21BCE2952
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F'SOP_21BCE2952

F'SOP_21BCE2952
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F'_POS_21BCE2952

F'_POS_21BCE2952
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fss_21BCE2952

fss_21BCE2952
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1-bit ALU

1-bit ALU
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FS_21BCE2952

FS_21BCE2952
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f'posnor

f'posnor
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Untitled

Untitled
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2-1 Multiplexer

2-1 Multiplexer
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DeMux 1:4

DeMux 1:4
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4:2 Encoder

4:2 Encoder
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F_POS_21BCE2952

F_POS_21BCE2952
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halfadder_21bce2952

halfadder_21bce2952
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HS_21BCE2952

HS_21BCE2952
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SOP2:1

SOP2:1
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SOP4:1

SOP4:1
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SOP Expression #1 using Decoder

SOP Expression #1 using Decoder
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f'sop in nand

f'sop in nand
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pos2:1

pos2:1
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2-1 Multiplexer

2-1 Multiplexer
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2-1 Multiplexer

2-1 Multiplexer
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Untitled

Untitled
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FULL SUBTRACTOR USING DECODER

FULL SUBTRACTOR USING DECODER
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full adder using decoder

full adder using decoder
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Half Adder using Decoder

Half Adder using Decoder
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4x1 Multiplexer

4x1 Multiplexer
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pos4:1

pos4:1
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pos8:1

pos8:1
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sop8:1

sop8:1
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Full Adder using 2, 4*1 MUX

Full Adder using 2, 4*1 MUX
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2:1 multiplexer

2:1 multiplexer
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one bit DR ALU

one bit DR ALU
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4x1 Multiplexer

4x1 Multiplexer
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2 to 4 Line Decoder

2 to 4 Line Decoder
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