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Ayan Acharya 21BCT0010

Member since: 2 years

Educational Institution: Not Entered

Country: Not Entered

Implementation steps for Task I and II using 4:1 Multiplexer

Implementation steps for Task I and II using 4:1 Multiplexer
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CAT 1 Q5

CAT 1 Q5
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CAT1 Q4

CAT1 Q4
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21BCT0010 1-bit ALU

21BCT0010 1-bit ALU
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F SOP circuit in AND-OR -INV logic

F SOP circuit in AND-OR -INV logic
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6 bit comparator

6 bit comparator
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8:1 MUX using 4:1 MUX

8:1 MUX using 4:1 MUX
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3:8 DECODER using 2:1 DECODER

3:8 DECODER using 2:1 DECODER
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Full Adder using 4:1 Mux

Full Adder using 4:1 Mux
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NAND logic circuit of 4:2 encoder

NAND logic circuit of 4:2 encoder
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F' NOR logic

F' NOR logic
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AOI logic circuit of 2:4 Decoder

AOI logic circuit of 2:4 Decoder
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Full Adder using 8:1 MUX

Full Adder using 8:1 MUX
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Implementation of Task 1 for 21BCT0010

Implementation of Task 1 for 21BCT0010
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Full Subtractor with a 3:8 Decoder

Full Subtractor with a 3:8 Decoder
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NAND logic circuit of 2:4 Decoder

NAND logic circuit of 2:4 Decoder
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AOI logic circuit of 4:2 encoder

AOI logic circuit of 4:2 encoder
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2:1 MUX Circuit using SOP Equation using NAND

2:1 MUX Circuit using SOP Equation using NAND
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2:1 MUX Circuit using POS Equation using NOR

2:1 MUX Circuit using POS Equation using NOR
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F' NAND logic

F' NAND logic
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F' POS circuit in OR-AND -INV logic

F' POS circuit in OR-AND -INV logic
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F' SOP circuit in AND-OR -INV logic

F' SOP circuit in AND-OR -INV logic
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Adder from full adder

Adder from full adder
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4 bit ALU_21BCT0010

4 bit ALU_21BCT0010
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2:4 Decoder using 1:2 Decoder

2:4 Decoder using 1:2 Decoder
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F NAND logic

F NAND logic
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F NOR logic

F NOR logic
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4X4 MULTIPLIER

4X4 MULTIPLIER
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Full bit adder using logic gates

Full bit adder using logic gates
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21BCT0010_SET_A_Q53

21BCT0010_SET_A_Q53
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21BCT0010_SET_B_Q53

21BCT0010_SET_B_Q53
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21BCT0010-1-BIT-ALU

21BCT0010-1-BIT-ALU
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Full Adder using 3:8 decoder

Full Adder using 3:8 decoder
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2:1 MUX Circuit using POS Equation

2:1 MUX Circuit using POS Equation
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CAT Q3

CAT Q3
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CAT 1 Q1

CAT 1 Q1
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CAT Q3

CAT Q3
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CAT 1 Q5

CAT 1 Q5
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CAT1 Q4

CAT1 Q4
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SET B HOTS QUESTION

SET B HOTS QUESTION
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Universal shift register 21BCT0010

Universal shift register 21BCT0010
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COMMON ANODE 7 SEGMENT DECODER

COMMON ANODE 7 SEGMENT DECODER
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Untitled

Untitled
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COMMON CATHODE 7 SEGMENT DECODER_16:1 MUX

COMMON CATHODE 7 SEGMENT DECODER_16:1 MUX
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16*1 mux using 4*1 mux

16*1 mux using 4*1 mux
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8:1 MUX using 4:1 MUX

8:1 MUX using 4:1 MUX
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8:1 MUX using 4:1 MUX

8:1 MUX using 4:1 MUX
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8:1 MUX using 4:1 MUX

8:1 MUX using 4:1 MUX
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8:1 mux using 2:1 mux

8:1 mux using 2:1 mux
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7 segmen decoder using 8:1 mux

7 segmen decoder using 8:1 mux
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COMMON ANODE SEVEN SEGMENT DECODER USING 16:1 MUX

COMMON ANODE SEVEN SEGMENT DECODER USING 16:1 MUX
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COMMON ANODE SEVEN SEGMENT DECODER USING 16:1 MUX

COMMON ANODE SEVEN SEGMENT DECODER USING 16:1 MUX
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decoder using demultiplexer

decoder using demultiplexer
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BCD to 8124 converter

BCD to 8124 converter
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BCD ripple counter

BCD ripple counter
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asynchronous counter

asynchronous counter
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asynchronous counter

asynchronous counter
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Mealy Machine

Mealy Machine
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Mealy Machine

Mealy Machine
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Moore Machine

Moore Machine
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Moore Machine

Moore Machine
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4-bit Magnitude comparator

4-bit Magnitude comparator
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4-bit Magnitude comparator

4-bit Magnitude comparator
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2:1 MUX Circuit using SOP Equation

2:1 MUX Circuit using SOP Equation
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Seven segment decoder circuit

Seven segment decoder circuit
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Seven segment decoder circuit

Seven segment decoder circuit
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Implementation of Task 1 for 21BCT0010 using 4:1 Multiplexer

Implementation of Task 1 for 21BCT0010 using 4:1 Multiplexer
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COMMON ANODE 7 SEGMENT DECODER

COMMON ANODE 7 SEGMENT DECODER
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16:1 MUX using 8:1 MUX

16:1 MUX using 8:1 MUX
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3X3 MULTIPLIER

3X3 MULTIPLIER
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Full Subtractor using 8:1 MUX

Full Subtractor using 8:1 MUX
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4:1 MUX using 2:1 MUX

4:1 MUX using 2:1 MUX
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16*1 mux using 4*1 mux

16*1 mux using 4*1 mux
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Full Subtractor using 4:1 Mux

Full Subtractor using 4:1 Mux
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BCD ripple counter

BCD ripple counter
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F POS circuit in OR-AND -INV logic

F POS circuit in OR-AND -INV logic
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COMMON ANODE SEVEN SEGMENT DECODER USING 16:1 MUX

COMMON ANODE SEVEN SEGMENT DECODER USING 16:1 MUX
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2x2 MULTIPLIER

2x2 MULTIPLIER
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BCD To 7 Segment Decoder

BCD To 7 Segment Decoder
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4-Bit Synchronous Up Counter

4-Bit Synchronous Up Counter
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4-Bit Synchronous Up Counter

4-Bit Synchronous Up Counter
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