project.name

G.Manoj

Member since: 2 years

Educational Institution: presidency university

Country: India

Experiment 7(2)

Experiment 7(2)
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photo 7

photo 7
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FULL SUPTRACTOR 9

FULL SUPTRACTOR 9
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HALF SUBTRACTOR 2

HALF SUBTRACTOR 2
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full syubtractor 4

full syubtractor 4
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full suptractor 6

full suptractor 6
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FULL SUPTRACTOR 8

FULL SUPTRACTOR 8
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exp 1(1)

exp 1(1)
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mux using basic and xor gate(1)

mux using basic and xor gate(1)
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Experiment 5(1)

Experiment 5(1)
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mux using basic xor gate (1)

mux using basic xor gate (1)
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mux(1)

mux(1)
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mux using basic gates and xor gate (2)

mux using basic gates and xor gate (2)
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demux(1)

demux(1)
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demux(2)

demux(2)
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de-multiplexer(1)

de-multiplexer(1)
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MUX(2)

MUX(2)
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mux(3)

mux(3)
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demux(3)

demux(3)
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demux(5)

demux(5)
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photo 2

photo 2
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photo 3

photo 3
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photo 4

photo 4
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photo 5

photo 5
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full subtractror(2)

full subtractror(2)
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Experiment 7(1)

Experiment 7(1)
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photo 2

photo 2
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full subtractor (1)

full subtractor (1)
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photo6

photo6
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full subtractor (last)

full subtractor (last)
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FULL SUBTRACTOR 7

FULL SUBTRACTOR 7
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Experiment 5

Experiment 5
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G.Manoj is not a collaborator of any project.

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