Exp 9(2)

Half Adder using XOR and NAND

Full Adder

Exp 7(2)

7(3)

4:1 Mux using Logic Gates

Exp 3(2)

EXP 3(3)

EXP 3(4)

Exp 3(5)

Exp 3(6)

cIRCUIT 2

Untitled

CIRCUIT 3

exp 8(2)

EXP 3 (1)

Experiment 1

Untitled

EXP 4(3)

exp 4(4)

exp 4(4)

4) DESIGN AND IMPLEMENTATION OF COMBINATIONAL CIRCUITS USING BASIC GATES

Exp 5(2)

D To JK Flip Flop Conversion

Exp 4(2)

Exp 8(1)

exp 9(1)

INTERNAL CIRCUIT OF 1:2 DEMUX USING TWO INPUT NAND GATE