project.name

Athira Shaji

Member since: 2 years

Educational Institution: Not Entered

Country: Not Entered

NAND GATE

NAND GATE
Public
project.name

AND GATE

AND GATE
Public
project.name

OR GATE

OR GATE
Public
project.name

NOT GATE

NOT GATE
Public
project.name

XOR GATE

XOR GATE
Public
project.name

NOR GATE

NOR GATE
Public
project.name

XNOR GATE

XNOR GATE
Public
project.name

XOR using BASIC Gates

XOR using BASIC Gates
Public
project.name

XOR using NAND Gates

XOR using NAND Gates
Public
project.name

XOR using NOR Gates

XOR using NOR Gates
Public
project.name

XNOR using NAND Gates

XNOR using NAND Gates
Public
project.name

XOR using NOR Gates

XOR using NOR Gates
Public
project.name

OR Gate using NAND

OR Gate using NAND
Public
project.name

XNOR using BASIC Gates

XNOR using BASIC Gates
Public
project.name

AND Gate using NAND

AND Gate using NAND
Public
project.name

Half Adder

Half Adder
Public
project.name

Half Adder using NAND gates

Half Adder using NAND gates
Public
project.name

Full Adder

Full Adder
Public
project.name

Full Subtractor

Full Subtractor
Public
project.name

Half Subtractor

Half Subtractor
Public
project.name

Full Adder using NAND Gates

Full Adder using NAND Gates
Public
project.name

Full Adder Implementation

Full Adder Implementation
Public
project.name

Adder / Subtractor

Adder / Subtractor
Public
project.name

GATES using MULTIPLEXER

GATES using MULTIPLEXER
Public
project.name

ALU Implementation

ALU Implementation
Public
project.name

Full Subtractor Implementation

Full Subtractor Implementation
Public
project.name

Half Adder using NOR gates

Half Adder using NOR gates
Public
project.name
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