lab 7-2
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Author: Andrea' Jones

Project access type: Public

Description:

Im going to design a Jk flip fltp with a basic AND and NAND gates.

Eventually I will design a SR counter using too AND Gate in order to make a 4 bit counter.

Notice that flip flop si alwyas on enabled mode, and result is just working with clock pulse.


Created: Dec 21, 2022

Updated: Aug 27, 2023


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