Full adder using display_rr
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Author: roberto radaelli

Forked from: nelapudisandeep/Full adder using display

Project access type: Public

Description:

this is a four bit parallel adder. In this i used the technique of BCD adder to make this.

Since the seven segment displays are 3:8 encoders I used a custom encoder of 4:8 encoder where 4 are the sum bits and 8 are the seven segment display bits.

Making this project is very helpful in understanding the concepts of bit range overflow in the adding two binary numbers and BCD numbers.

Created: Jun 12, 2024

Updated: Jun 13, 2024


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