Member since: 2 years
Educational Institution: Not Entered
Country: Not Entered
EXP 7To design and implement a logic circuit for full subtractor using NAND gates.
EXP 7To design and implement a logic circuit for full subtractor using NAND gates.T_FLIPFLOP_USING_JKFLIPFLOP
T_FLIPFLOP_USING_JKFLIPFLOP4:2 priority encoder
4:2 priority encoder4_BIT_BIDIRECTIONAL_SHIFT_REGISTER
4_BIT_BIDIRECTIONAL_SHIFT_REGISTERMASTERSLAVE_JK_FLIP_FLOP
MASTERSLAVE_JK_FLIP_FLOPBT20ECE105_EXP4 To verify the truth tables of 8:1 Multiplexer.
BT20ECE105_EXP4 To verify the truth tables of 8:1 Multiplexer.BOOLEAN USING NAND GATE
BOOLEAN USING NAND GATEBT20ECE105 EXP 2 Design NOT, OR, AND and EX-OR logic gates using NAND gate and verify the output.
BT20ECE105 EXP 2 Design NOT, OR, AND and EX-OR logic gates using NAND gate and verify the output.D_FLIPFLOP_USING_JKFLIPFLOP
D_FLIPFLOP_USING_JKFLIPFLOPEXP 5To verify the truth tables of 3-bit Decoder.
EXP 5To verify the truth tables of 3-bit Decoder.BT20ECE105 EXP 3 Implement the Boolean function using minimum number of NAND gates
BT20ECE105 EXP 3 Implement the Boolean function using minimum number of NAND gatesEXP 6 To design and implement a logic circuit for full adder using NAND gates.
EXP 6 To design and implement a logic circuit for full adder using NAND gates.BT20ECE105_EXP 1_To verify the truth tables of AND, OR, NOT, NAND, NOR, EX-OR logic gates.
BT20ECE105_EXP 1_To verify the truth tables of AND, OR, NOT, NAND, NOR, EX-OR logic gates.