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Álvaro

Member since: 426 days

Educational Institution: Not Entered

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Proyect P1 18.11.2019

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Proyect P1 18.11.2019
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Counter

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Counter
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RAMs up to 8 bits, synchronous or always enabled output

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RAMs up to 8 bits, synchronous or always enabled output
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BCD to 7dig displ

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BCD to 7dig displ
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Hamming(7,4)

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Hamming(7,4)
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Comparators, 2 bit, 4 bit, 8 bit

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Comparators, 2 bit, 4 bit, 8 bit
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Displacement register

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Displacement register
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Up to 8bit ALU , Full-adder plus CA2 subtraction

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Up to 8bit ALU , Full-adder plus CA2 subtraction
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BCD

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BCD
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