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1 - bit alu many to one
1 - bit alu many to one1x8 demux
1x8 demux4X1 MULTIPLEXER
4X1 MULTIPLEXER4X1 MULTIPLEXER
4X1 MULTIPLEXERDE - MULTIPLEXER
DE - MULTIPLEXERENCODER VIT
ENCODER VITFull adder using 2x1 MUX
Full adder using 2x1 MUXDECODER VIT
DECODER VITFull adder using 2x1 MUX
Full adder using 2x1 MUXENCODER VIT
ENCODER VIT8X3 DECODER
8X3 DECODER4 Bit ALU using 1 Bit ALU
4 Bit ALU using 1 Bit ALU32 to 1 mux using 4 to 1 mux
32 to 1 mux using 4 to 1 muxBINARY LEFT AND RIGHT SHIFT
BINARY LEFT AND RIGHT SHIFT3 - BIT multiplication algorithum
3 - BIT multiplication algorithumFull adder using 2x1 MUX
Full adder using 2x1 MUXBINARY LEFT AND RIGHT SHIFT
BINARY LEFT AND RIGHT SHIFT2 BIT ADD/SUB ALGO
2 BIT ADD/SUB ALGOLAB 4
LAB 4L4
L44 bit memory register w/ D Flip Flop
4 bit memory register w/ D Flip FlopDECODER VIT
DECODER VITFlip-Flops using NAND Gate
Flip-Flops using NAND Gate1 - bit alu many to one
1 - bit alu many to one1 - bit alu many to one
1 - bit alu many to onemodel lab fat 4 times right shift
model lab fat 4 times right shiftDemultiplexer
Demultiplexer4 Bit ALU using 1 Bit ALU
4 Bit ALU using 1 Bit ALU3 - BIT multiplication algorithum
3 - BIT multiplication algorithum2 BIT ADD/SUB ALGO
2 BIT ADD/SUB ALGO2 BIT ADD/SUB ALGO
2 BIT ADD/SUB ALGOJK FlipFlop using AND and NOR Gates
JK FlipFlop using AND and NOR GatesDemultiplexer
Demultiplexer