project.name

Yash Ruhela

Member since: 2 years

Educational Institution: Not Entered

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synchronous 4 bit counter

synchronous 4 bit counter
Public
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asynchronous 4bit counter

asynchronous 4bit counter
Public
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3*8 decoder using 1*2 decoder

3*8 decoder using 1*2 decoder
Public
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shift register(serial in parellel out) using D flip flop

shift register(serial in parellel out) using D flip flop
Public
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demultiplexer using 1*2 decoder

demultiplexer using 1*2 decoder
Public
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16*1 mux using 4*1 mux

16*1 mux using 4*1 mux
Public
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