project.name

Yash Ruhela

Member since: 3 years

Educational Institution: Not Entered

Country: Not Entered

synchronous 4 bit counter

synchronous 4 bit counter
Public
project.name

asynchronous 4bit counter

asynchronous 4bit counter
Public
project.name

3*8 decoder using 1*2 decoder

3*8 decoder using 1*2 decoder
Public
project.name

shift register(serial in parellel out) using D flip flop

shift register(serial in parellel out) using D flip flop
Public
project.name

demultiplexer using 1*2 decoder

demultiplexer using 1*2 decoder
Public
project.name

16*1 mux using 4*1 mux

16*1 mux using 4*1 mux
Public
project.name
No result image
Yash Ruhela doesn't have any favourites.
No result image
Yash Ruhela is not a collaborator of any project.