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BT20ECE060_Kumar_Mridul

Member since: 3 years

Educational Institution: Visvesvaraya National Institute Of Technology

Country: India

Experiment 1:Verifying truth table for gates

Experiment 1:Verifying truth table for gates
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Implement the Boolean function using minimum number of NAND Gates

Implement the Boolean function using minimum number of NAND Gates
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Experiment 6: To verify the truth tables of 8x1 multiplexer

Experiment 6: To verify the truth tables of 8x1 multiplexer
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Experiment 2: Verification of De Morgan's Law

Experiment 2: Verification of De Morgan's Law
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Experiment 3:To implement the following boolean functions using minimum number of NAND Gates

Experiment 3:To implement the following boolean functions using minimum number of NAND Gates
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Experiment 7:To verify the truth tables of 3 bit Decoder

Experiment 7:To verify the truth tables of 3 bit Decoder
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Experiment 8: To design and implement a logic circuit for full adder using NAND gates

Experiment 8: To design and implement a logic circuit for full adder using NAND gates
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XOR using NAND gates

XOR using NAND gates
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AND,NOT & OR gates using NAND gates

AND,NOT & OR gates using NAND gates
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Experiment 10: J-K Flip Flop (VERIFICATION AND IMPLEMENTATION OF MASTER SLAVE USING J-K FLIP FLOP)

Experiment 10: J-K Flip Flop (VERIFICATION AND IMPLEMENTATION OF MASTER SLAVE USING J-K FLIP FLOP)
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Experiment 12: Verification of truth table of four bit bidirectional shift register

Experiment 12: Verification of truth table of four bit bidirectional shift register
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Experiment 11:To convert JK to T Flip flop, JK to D Flip flop

Experiment 11:To convert JK to T Flip flop, JK to D Flip flop
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