8:3

priority

4:2 priority encoder

XOR USING NAND

XOR Gate TT verification

NOR Gate TT verification

OR Gate TT verification

AND Gate TT verification

NOT Gate TT verification

Full Adder using NAND gates

J-K Flipflop

NAND Gate TT verification

XNOR Gate TT verification

8x1 and 16x1 mux from 2x1 mux

Verification of truth table of multiplexers (16x1,8x1)

NOT USING NAND

OR USING NAND

AND USING NAND

8:1 mux using 2:1

Decade counter

3:8 DECODER

J-K FLIP FLOP TO T FLIP FLOP

NAND GATES

Exp-1

JK FLIP FLOP TO D FLIP FLOP

MASTER SLAVE J-K FLIP FLOP

4-BIT BIDIRECTIONAL SHIFT REGISTER

AND GATE STIMULATION

XOR GATE STIMULATION

XOR using NAND gates

Boolean Expression using NAND Gates

basic gates stimulation