Member since: 2 years
Educational Institution: Visvesvaraya National Institute Of Technology
Country: India
EXPERIMENT1-XNOR gate_Truth Table_Verification
EXPERIMENT1-XNOR gate_Truth Table_VerificationEXPERIMENT3- NOT gate using NAND gate
EXPERIMENT3- NOT gate using NAND gateEXPERIMENT7-Verification of truth Table of 3:8 Decoder
EXPERIMENT7-Verification of truth Table of 3:8 DecoderEXPERIMENT11-Conversion of J/K to D Flip Flop
EXPERIMENT11-Conversion of J/K to D Flip FlopEXPERIMENT12-4 bit Bidirectional Shift Register
EXPERIMENT12-4 bit Bidirectional Shift RegisterEXPERIMENT11-Conversion of J/K to T Flip Flop
EXPERIMENT11-Conversion of J/K to T Flip FlopEXPERIMENT10-Verification of J/K FlipFlop
EXPERIMENT10-Verification of J/K FlipFlopEXPERIMENT10-Master Slave condition using J/K Flip Flop
EXPERIMENT10-Master Slave condition using J/K Flip FlopEXPERIMENT1-AND gate_Truth Table_Verification
EXPERIMENT1-AND gate_Truth Table_VerificationEXPERIMENT1-NAND_Truth Table_Verification
EXPERIMENT1-NAND_Truth Table_VerificationEXPERIMENT3-OR gate using NAND gate
EXPERIMENT3-OR gate using NAND gateEXPERIMENT1-OR gate_Truth Table_Verification
EXPERIMENT1-OR gate_Truth Table_VerificationEXPERIMENT3-AND gate using NAND gate
EXPERIMENT3-AND gate using NAND gateEXPERIMENT3-XOR gate using NAND
EXPERIMENT3-XOR gate using NANDEXPERIMENT4-Implementing A(Bbar+C) using min NAND gates
EXPERIMENT4-Implementing A(Bbar+C) using min NAND gatesEXPERIMENT1-NOT gate_Truth Table_Verification
EXPERIMENT1-NOT gate_Truth Table_VerificationEXPERIMENT1-XOR gate_Truth Table_verification
EXPERIMENT1-XOR gate_Truth Table_verificationEXPERIMENT8-Full Adder using NAND gates
EXPERIMENT8-Full Adder using NAND gatesEXPERIMENT1-NOR gate_Truth Table_Verification
EXPERIMENT1-NOR gate_Truth Table_Verification