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DCMP lab experiment 2
DCMP lab experiment 2dcmp lab 1
dcmp lab 1DCMP LAB 5
DCMP LAB 5DCMP LAB 4
DCMP LAB 42:1 MUX using NAND gates
2:1 MUX using NAND gatesJK FF
JK FF8:1 MUX using 2:1 MUX
8:1 MUX using 2:1 MUX3:8 DECODER
3:8 DECODERFull Adder using NAND
Full Adder using NANDMaster slave condition using JK FF
Master slave condition using JK FFT FF using JK FF
T FF using JK FFD-FF using JK-FF
D-FF using JK-FFBT20ECE059-4 BIT BIDIRECTIONAL SHIFT REGISTER
BT20ECE059-4 BIT BIDIRECTIONAL SHIFT REGISTER4 bit bidirectional shift register
4 bit bidirectional shift registerBT20ECE059-4 BIT BIDIRECTIONAL SHIFT REGISTER
BT20ECE059-4 BIT BIDIRECTIONAL SHIFT REGISTER