project.name

Shreyosi Santra

Member since: 3 years

Educational Institution: Not Entered

Country: Not Entered

Practice

Practice
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project.name

AND , OR, NOT Gate using NAND Gate

AND , OR, NOT Gate using NAND Gate
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project.name

AND,OR,NOT Gate using NOR Gate

AND,OR,NOT Gate using NOR Gate
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project.name

HALF ADDER

HALF ADDER
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project.name

HALF SUBTRACTOR

HALF SUBTRACTOR
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project.name
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XOR USING NAND , NOR

XOR USING NAND , NOR
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X-NOR USING NAND , NOR

X-NOR USING NAND , NOR
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FULL ADDER

FULL ADDER
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project.name

FULL SUBTRACTOR

FULL SUBTRACTOR
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project.name

Two to Four

Two to Four
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project.name

3 TO 8 DECODER

3 TO 8 DECODER
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project.name

4 : 1 MUX

4 : 1 MUX
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project.name

S-R FLIP FLOP ...

S-R FLIP FLOP ...
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project.name

D FLIP FLOP

D FLIP FLOP
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project.name

J-K FLIP FLOP

J-K FLIP FLOP
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project.name

HALF ADDER , SUBTRACTOR

HALF ADDER , SUBTRACTOR
Public
project.name