Suvechha Bose - Circuits

Suvechha Bose

Member since: 3 years

Educational Institution: Not Entered

Country: Not Entered

D FLIP FLOP

D FLIP FLOP

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NOT gate using universal gates

NOT gate using universal gates

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2 to 4 Decoder

2 to 4 Decoder

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Half_Adder

Half_Adder

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Full Subtractor

Full Subtractor

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Full_Adder

Full_Adder

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Half_Subtractor

Half_Subtractor

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4:1 MUX

4:1 MUX

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RS flip-flop

RS flip-flop

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D flip-flop

D flip-flop

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JK Flip flop

JK Flip flop

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AND GATE USING NAND , NOR

AND GATE USING NAND , NOR

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NAND USING NOR

NAND USING NOR

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X-NOR USING NAND , NOR

X-NOR USING NAND , NOR

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XOR USING NAND , NOR

XOR USING NAND , NOR

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OR GATE USING NAND , NOR

OR GATE USING NAND , NOR

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NOR USING NAND

NOR USING NAND

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Suvechha Bose doesn't have any favourites.

Half_Adder

Half_Adder

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Half_Adder

Half_Adder

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Full_Adder

Full_Adder

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Half_Subtractor

Half_Subtractor

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Full Subtractor

Full Subtractor

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D flip-flop

D flip-flop

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RS flip-flop

RS flip-flop

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Full Subractor

Full Subractor

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3*8 Decoder

3*8 Decoder

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JK Flip Flop

JK Flip Flop

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POS

POS

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SOP

SOP

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4:1 MUX

4:1 MUX

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NOR USING NAND

NOR USING NAND

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NAND USING NOR

NAND USING NOR

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X-NOR USING NAND , NOR

X-NOR USING NAND , NOR

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XOR USING NAND , NOR

XOR USING NAND , NOR

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XOR USING NAND , NOR

XOR USING NAND , NOR

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D FLIP FLOP

D FLIP FLOP

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project.name

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