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Rahul Singh

Member since: 2 years

Educational Institution: Not Entered

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8x3decoder

8x3decoder
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Uexpntitled

Uexpntitled
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4*1mul

4*1mul
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Experiment-10

Experiment-10
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Experiment-10

Experiment-10
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exper-11

exper-11
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Design a 2-bit Arithmetic Logic Unit

Design a 2-bit Arithmetic Logic Unit
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Experiment5

Experiment5
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Project 2

Project 2
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4 bit carry look ahead adder

4 bit carry look ahead adder
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4*4 array multiplier

4*4 array multiplier
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4x4 array multiplier

4x4 array multiplier
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4x4 array multiplier

4x4 array multiplier
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4x4 array multiplier

4x4 array multiplier
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4x4 array multiplier

4x4 array multiplier
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EXPERIMENT 7

EXPERIMENT 7
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Experiment 8 decoder (3 x 8)

Experiment 8 decoder (3 x 8)
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2*4 decoder

2*4 decoder
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4 x 1 multiplexer

4 x 1 multiplexer
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8 x 1 multiplexer

8 x 1 multiplexer
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Experiment 3

Experiment 3
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Experiment 3

Experiment 3
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4 bit binary to gray, gray to binary

4 bit binary to gray, gray to binary
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experiment 6

experiment 6
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experiment 6

experiment 6
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Project 2

Project 2
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experiment 6

experiment 6
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Project 2

Project 2
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Exp 6B - 3 Bit Binary Multiplier

Exp 6B - 3 Bit Binary Multiplier
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3X3 ARRAY MULTIPLIER

3X3 ARRAY MULTIPLIER
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exper1

exper1
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4-bit-carry-lookahead-adder

4-bit-carry-lookahead-adder
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4 bit carry look ahead adder

4 bit carry look ahead adder
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4x4 array multiplier

4x4 array multiplier
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EXPER-11

EXPER-11
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3 bits carry look ahead adder

3 bits carry look ahead adder
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Rahul Singh is not a collaborator of any project.

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