SR Flip Flop
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Author: ENG20DS0044 _Vedanth Baliga

Project access type: Public

Description:

In this Circuit I have showed the implementation of SR Active High Flip Flop with NOR Gates. 

Author : Vedanth V Baliga

USN : ENG20DS0044

Course : Digital Electronics and Logic Design

Section : 3rd Semester H Section, DSU SOE


Created: Nov 27, 2021

Updated: Aug 27, 2023


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