project.name

021_Navoneel Sarkar_St. Ch.

Member since: 3 years

Educational Institution: Not Entered

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OR gate using NAND gate

OR gate using NAND gate
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AND using NAND gate

AND using NAND gate
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Half Adder

Half Adder
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Full Adder

Full Adder
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Full Subtractor

Full Subtractor
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Full Subtractor

Full Subtractor
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R-S Flip Flop

R-S Flip Flop
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4:1 Multiplexer

4:1 Multiplexer
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D Flip Flop

D Flip Flop
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J-K Flip Flop

J-K Flip Flop
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SOP

SOP
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POS

POS
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Half Subtractor

Half Subtractor
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NOT gate using NAD gate

NOT gate using NAD gate
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