project.name

Visakh Sunil

Member since: 3 years

Educational Institution: Not Entered

Country: Not Entered

fcghck

fcghck
Public
project.name

DE - 3

DE - 3
Public
project.name

Half Adder - Universal Gates

Half Adder - Universal Gates
Public
project.name

Half Adder - Basic

Half Adder - Basic
Public
project.name

Full Adder - basic gates

Full Adder - basic gates
Public
project.name

mux

mux
Public
project.name

demux

demux
Public
project.name

Gray to Binary

Gray to Binary
Public
project.name

Binary to Gray

Binary to Gray
Public
project.name

asynchronous counter using jk flipflop

asynchronous counter using jk flipflop
Public
project.name

johnson counter

johnson counter
Public
project.name

Serial In Parallel out

Serial In Parallel out
Public
project.name

ring counter

ring counter
Public
project.name

Full Adder - Universal Gates

Full Adder - Universal Gates
Public
project.name

Serial in Serial out

Serial in Serial out
Public
project.name
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