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Forked from: Richard Pawson/Static RAM
Project access type: Public
Emulation of 'static RAM', which is essentially built from D-type flip-flops.
The principal difference between this and the standard RAM component in CircuitVerse is that all the static RAMs in this project are edge-triggered for write (reading is asynchronous).
The basic building block is the 1x8-bit SRAM circuit - a single byte of memory, built from an 8-bit D-type flip flop.
16 of these are then used in a 4 x 4 grid to build the 16x8-bit SRAM circuit, which now includes the necessary 4-bit address decoding circuitry.
16 of these are then used in a 4 x 4 grid to build the 256x8-bit SRAM circuit.
The pattern could be applied recursively to build, in turn, a 4KB, 64KB, 1MB chip, and so on.
Created: Nov 19, 2021
Updated: Nov 19, 2021