project.name

Aadil

Member since: 4 years

Educational Institution: Not Entered

Country: India

Synchronous

Synchronous
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FULL ADDER

FULL ADDER
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22.7.19

22.7.19
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MULTIPLEXER SUBTRACTER

MULTIPLEXER SUBTRACTER
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D synchronous

D synchronous
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Tri-State using Mux only

Tri-State using Mux only
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VIVA PROJECT

VIVA PROJECT
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4 bit Full Adder

4 bit Full Adder
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Tri State

Tri State
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26.08.20 (Review Test)

26.08.20 (Review Test)
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PRIORITY ENCODER

PRIORITY ENCODER
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Open Ended Results

Open Ended Results
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4 BIT BCD ADDER

4 BIT BCD ADDER
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FULL ADDER (NAND GATES)

FULL ADDER (NAND GATES)
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5.8.20

5.8.20
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Aadil doesn't have any favourites.
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Aadil is not a collaborator of any project.

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