HDL simulation
0 Stars     12 Views    

Author: Ben

Forked from: shri nidhi/HDL simulation

Project access type: Public

Description:

MODULE HalfAdder(A, B, Sum, Carry);

    INPUT A, B;

    OUTPUT Sum, Carry;


    XOR (Sum, A, B);    // Sum = A ⊕ B

    AND (Carry, A, B);  // Carry = A ∧ B


ENDMODULE;


Created: Jan 10, 2025

Updated: Jan 10, 2025


Comments

You must login before you can post a comment.