project.name

Aalekh Chaudhary

Member since: 2 months

Educational Institution: Not Entered

Country: India

Implement (2 to 4) line and (3 to 8) line Decoders.

Implement (2 to 4) line and (3 to 8) line Decoders.
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2*2 binary multiplier

2*2 binary multiplier
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half subtractor

half subtractor
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4 bit full adder

4 bit full adder
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Full subtractor

Full subtractor
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(4 to 2) line and (8 to 3) Line Encoders

(4 to 2) line and (8 to 3) Line Encoders
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full adder

full adder
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half adder

half adder
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4x1 MUX using logic gates

4x1 MUX using logic gates
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8X1 mux using 4X1 mux

8X1 mux using 4X1 mux
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8x1 Multiplexer using 4x1 Multiplexer

8x1 Multiplexer using 4x1 Multiplexer
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4:1 Mux using Logic Gates

4:1 Mux using Logic Gates
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Implement 3-bit parallel Binary Adder/Subtractor

Implement 3-bit parallel Binary Adder/Subtractor
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3 bits carry look ahead adder

3 bits carry look ahead adder
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EXP-4

EXP-4
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