divyanshusingh 21220PHY004
Member since: 92 days
Educational Institution: institute of science (BHU)
Country: India
HALF ADDER
HALF ADDER
Public
FULL ADDER
FULL ADDER
Public
ASSIGNMENT 71
ASSIGNMENT 71
Public
ASSIGNMENT 7 5
ASSIGNMENT 7 5
Public
ASSIGNMENT 9 2
ASSIGNMENT 9 2
Public
ASSIGNMENT 9 1
ASSIGNMENT 9 1
Public
ASSIGNMENT 9 2
ASSIGNMENT 9 2
Public
design of a combination circuit of half subtractor
design of a combination circuit of half subtractor
Public
design of a combination circuit of half subtractor
design of a combination circuit of half subtractor
Public
DESIGN OF A COMBINATION CIRCUIT FOR HALF SUBTRACTER
DESIGN OF A COMBINATION CIRCUIT FOR HALF SUBTRACTER
Public
ASSIGNMENT 9 3
ASSIGNMENT 9 3
Public
ASSIGNMEN 9 5
ASSIGNMEN 9 5
Public
ASSIGNMEN 9 5,6 6
ASSIGNMEN 9 5,6 6
Public
ASSIGNMENT 9 4
ASSIGNMENT 9 4
Public
ASSIGNMENT 10 1
ASSIGNMENT 10 1
Public
ASSIGNMENT 8 1
ASSIGNMENT 8 1
Public
ASSIGNMENT 8 ,3
ASSIGNMENT 8 ,3
Public
logic diagram to implement basic logic gates (AND,OR,NOT) using NAND only
logic diagram to implement basic logic gates (AND,OR,NOT) using NAND only
Public
logic diagram of basic logic gates(OR,AND and NOT) using NAND gate
logic diagram of basic logic gates(OR,AND and NOT) using NAND gate
Public
divyanshusingh 21220PHY004 doesn't have any favourites.
