BT20ECE080_Sudhanshu_Ramteke
Member since: 2 years
Educational Institution: Not Entered
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2:1 MUX USING NAND GATE
2:1 MUX USING NAND GATE
Public
8:1 MUX USING 2:1 MUX
8:1 MUX USING 2:1 MUX
Public
BT20ECE080_NOR_Gate_Truthtable_verification
BT20ECE080_NOR_Gate_Truthtable_verification
Public
BT20ECE080_NOT_Gate_Truthtable_verification
BT20ECE080_NOT_Gate_Truthtable_verification
Public
BT20ECE080_EXNOR_Gate_Truthtable_verification
BT20ECE080_EXNOR_Gate_Truthtable_verification
Public
BT20ECE080_EXOR_Gate_Truthtable_Verification
BT20ECE080_EXOR_Gate_Truthtable_Verification
Public
4 bit bidirectional shift register
4 bit bidirectional shift register
Public
8:3 ENCODER
8:3 ENCODER
Public
DECODER 3:8
DECODER 3:8
Public
T and D F/F using JK F/F
T and D F/F using JK F/F
Public
NAND GATE
NAND GATE
Public
De'morgance law
De'morgance law
Public
Boolean function using minimum no. of NAND gate
Boolean function using minimum no. of NAND gate
Public
Full adder using NAND gate
Full adder using NAND gate
Public
JK F/F truthtable and Master slave JK f/f
JK F/F truthtable and Master slave JK f/f
Public
LAB 2 Circuit using NANd Gate
LAB 2 Circuit using NANd Gate
Public
PRIORITY ENCODER 4:2
PRIORITY ENCODER 4:2
Public
synchronous 2 bit counter
synchronous 2 bit counter
Public
BT20ECE080_AND_Gate_Truthtable verification
BT20ECE080_AND_Gate_Truthtable verification
Public
BT20ECE080_OR_Gate_Truthtable_Verification
BT20ECE080_OR_Gate_Truthtable_Verification
Public
logic gates using minimum no. of NAND gates
logic gates using minimum no. of NAND gates
Public
decade counter
decade counter
Public
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