project.name

BT20ECE019_CHAKKA_SABAREESH

Member since: 3 years

Educational Institution: Not Entered

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nand gate tt verification

nand gate tt verification
Public
project.name

and gate using nand gate

and gate using nand gate
Public
project.name

exor using nand

exor using nand
Public
project.name

expt 5 dcmp

expt 5 dcmp
Public
project.name

not gate tt verifcation

not gate tt verifcation
Public
project.name

8x1 and 16x1 mux from 2x1 mux

8x1 and 16x1 mux from 2x1 mux
Public
project.name

8:3 ENCODER

8:3 ENCODER
Public
project.name

Full Adder using NAND gates

Full Adder using NAND gates
Public
project.name

J-K Flipflop

J-K Flipflop
Public
project.name

and gate tt verification

and gate tt verification
Public
project.name

xor gate tt verification

xor gate tt verification
Public
project.name

xnor tt verification

xnor tt verification
Public
project.name

T flip-flop

T flip-flop
Public
project.name

D flip-flop

D flip-flop
Public
project.name

Master slave JK flipflop

Master slave JK flipflop
Public
project.name

nor gate tt verification

nor gate tt verification
Public
project.name

or using nand

or using nand
Public
project.name

not using nand

not using nand
Public
project.name

or gate tt verification

or gate tt verification
Public
project.name

Verification of truth table of multiplexers (16x1,8x1)

Verification of truth table of multiplexers (16x1,8x1)
Public
project.name

Decoder 3:8

Decoder 3:8
Public
project.name

4:2 priority encoder

4:2 priority encoder
Public
project.name

4-BIT BIDIRECTIONAL SHIFT REGISTER

4-BIT BIDIRECTIONAL SHIFT REGISTER
Public
project.name
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