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Verilog issues
Created by Jorge Eduardo Ibarra Esquer • 2 years ago
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Jorge Eduardo Ibarra Esquer
On Mar 08, 2021
Is there any page where you discuss the Verilog limitations, bugs, errors, etc. in CircuitVerse or any kind of documentation on the language?
noulmao
On May 13, 2021
here.
滑翔翼之舞
On Oct 13, 2021
我也遇到相同的問題，把檔案上傳之後就不行運行 verilog
